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43篇 您的检索式：作者名="GULAK"

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	题名	作者	年代	出处	被引量
1	Architectural tradeoff for survivor sequence memory management in Viterbi decoders显示文摘	Feygin G Gulak P G	1993	IEEE Transaction on Communication1993，41，3：	1
2	A survey of circuit innovations in ferroelectric random-access memories 显示文摘	SHEIKHOLESLAMI A GULAK P G	2000	Proc IEEE2000，88，5：	1
3	Reduced complexity symbol detectors with parallel structures for it's charmels显示文摘	Erfaaian J A Pasupathy S Gulak G	1994	IEEE Transactions on Communications1994，42，：	1
4	Simplified MAP algorithm suitable for implementation of turbo decoders显示文摘	GROSS W J GULAK P G	1998	Electron Letters1998，34，16：	1
5	Reduced Complexily Symbol Detectors with Parallel Structures for Its Channels显示文摘	Erfanian J A Pasupathy S Gulak G	1994	IEEE Transactions on Communications1994，42，：	1
6	Simplified MAP Algorithm Suitable for Implementation of Turbo Decoders 显示文摘	Gross W J Gulak P G	1998	IEEE Electronics Letters1998，34，16：	1
7	Reduced complexity symbol detectors with parallel structures for ISI channels显示文摘	PASUPATHY S GULAK G	1994	IEEE Trans Commun1994，42，：	1
8	A multiprocessor architecture for Viterbi decoders with linear speedup显示文摘	Gennady Feygin Patrick G Gulak	1993	IEEE Transactions on Signal Processing1993，41，9：	1
9	Reduced complexity symbol detectors with parallel structures for it's channels显示文摘	J A Erfanian S Pasupathy G Gulak	1994	IEEE Transactions on Communications1994，42，：	1
10	Reduced complexity symbol detectors with parallel structures for is channels显示文摘	ERFANIAN J A PASUPATHY S GULAK G	1994	IEEE Transactions on Communicalions1994，42，5：	1
11	A survey of circuit innovations in ferroelectric random-access mem-ories显示文摘	SHEIKHOLESLAMI A GULAK P G	2000	Proc IEEE2000，88，5：	1
12	Simplified MAP algorithm suitable for implementation of turbo decoders 显示文摘	Gross V? J Gulak P G	1998	IEEE lectron Lett1998，34，16：	1
13	A survey of circuit innovations in ferroelectric random access memories 显示文摘	Sheikholeslami A Gulak P G	2000	Proceedings of the IEEE2000，88，5：	1
14	Simplified MAP algorithm suitable for implementation of turbo decoders 显示文摘	GROSS W J GULAK P G	1998	IEEE Electronics Letters1998，34，16：	1
15	VLSI architectures for the MAP algorithm显示文摘	Boutillon E Gross W J Gulak P G	2003	IEEE Trans-COM2003，51，：	1
16	Programmable interleaver design for analog iterative decoders显示文摘	GAUDET V C GAUDET R J GULAK P G	2002	Circuits and Systems Ⅱ: Analog and Digital Signal Processing IEEE Transactions on [see also Circuits and Systems Ⅱ: Express Briefs IEEE Transactions on]2002，49，7：	1
17	Fully parallel integrated CAM/RAM using preclassification to enable large capacities 显示文摘	SCHULTZ K J GULAK P G	1996	IEEE Solid-state Circuits Journal1996，31，5：	1
18	Architectural Tradeoffs for Survivor Sequence Memory Management in Viterbi Decoder 显示文摘	Gennady Feygin P G Gulak	1993	IEEE Transactions on Communications1993，41，3：	1
19	Reduced Com-plexity Symbol Detectors with Parallel Structures for ISI Channels显示文摘	Erfanian J Pasupathy S Gulak G		0，，234：	1
20	A survey of circuit innovations in ferroelectric random-access memories显示文摘	SHEIKHOLESLAMI A GULAK P G	2000	Proc IEEE2000，88，5：	1

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