Contact etch process optimization for RF process wafer edge yield improvement

查看全文 作　　者：Zhangli [1]Liu;Bingkui [1]He;Fei [1]Meng;Qiang [1]Bao;Yuhong [1]Sun;Shaojun [1]Sun;Guangwei [1]Zhou;Xiuliang [1]Cao;Haiwei [1]Xin

机构地区：[1]Shanghai Huahong Grace Semiconductor Manufacturing Corporation

出　　处：《Journal of Semiconductors》索引2019年第40卷第12期,共4页

基　　金：supported by Shanghai Rising-Star Program (B type) (No. 18QB1401900) 摘　　要：Radio-frequency(RF)process products suffer from a wafer edge low yield issue,which is induced by contact opening.A failure mechanism has been proposed that is based on the characteristics of a wafer edge film stack.The large step height at the wafer's edge leads to worse planarization for the sparse poly-pattern region during the inter-layer dielectric(ILD)chemical mechanical polishing(CMP)process.A thicker bottom anti-reflect coating(BARC)layer was introduced for a sparse poly-pattern at the wafer edge region.The contact open issue was solved by increasing the break through(BT)time to get a large enough window.Well profile and resistance uniformity were obtained by contact etch recipe optimization. 关键词：bottom anti-reflect coating break through wafer edge PLANARIZATION

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Contact etch process optimization for RF process wafer edge yield improvement

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