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24篇 您的检索式:期刊名="VLSI Circuits"
    题名 作者 年代 出处 被引量
1Novel co-design of NAND Flash memory and high-speed solid-state drives显示文摘Takeuchi K 2009VLSI circuit2009,44,4:1
2Novel co-design of NAND Flash memory and high-speed solid-state drives 显示文摘Takeuchi K 2009VLSI circuit2009,44,4:1
318 Gb/s optical IO: VCSEL driver and TIA in 90 nm CMOS显示文摘KERN A M CHANDREKASON A P YOUNG I A 2007IEEE Syrup VLSI Circuits2007,,7:1
4A CMOS limiting amplifier and signal-strength indicator显示文摘Khorram S Rofougaran A Abidi A A 1995Symposium on VLSI circuits1995,12,3:1
5An advanced fingerprint sensor LSI and its application to a fingerprint identification system显示文摘Morimura H Shigematsu S Shimamura T etal 2014IEEE Symposium on VLSI Circuits2014,,11:1
6A design of a compact 2GHz-PLLwith a new adaptive active loop filter circuit显示文摘Toyama M Dosho S Yanagisawa N 2003IEEE Syrup VLSI Circuits Dig Tech Papers2003,,:1
7Mobile Terminals Toward LTE and Requirements on Decive Technologies显示文摘Maruyama S 2007IEEE Symposium on VLSI Circuits2007,88,07:1
8Phase noise in CMOS differential LC oscillators显示文摘Hajirniri A Lee T H 1998VLSI Circuits1998,,6:1
9A 71 dB dynamic range third-order TDC using charge-pump 显示文摘Gande M Maghari N OH T 2012Proc IEEE Symp VLSI Circuits Dig2012,38,7:1
10A compact eFUSE programmable array memory for SOl CMOS显示文摘SAFRAN J LESLIE A FREDEMAN G 2007IEEE Symposium VLSI Circuits Meeting2007,,:1
11A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation显示文摘Sinangil Y Neuman S M Sinangil M E 2014Symposium on Vlsi Circuits Digest of Technical Papers2014,,:1
12Accurate analysis of on-chip inductance effects and implications for optimal repeater insertion and technology scaling显示文摘Banerjee Kaustav Mehrotra Amit 2001IEEE Symposium on VLSI Circuits2001,6,:1
13Adaptive Bandwidth DLLs and PLLs Using Regulated Supply CMOS Buffers 显示文摘Sidiropoulos S Liu D Kim J 2000Syrup on VLSI Circuits Digest Technical Papers Honolulu HI2000,2000,:1
14A 6-GB/s CMOS phase-detecting DEMUX module using half-frequency clock 显示文摘Nakamura K Fukaishi M 1998VLSI Circuits1998,,6:1
15Accurate analysis of on-chip inductance effects and implications for optimal repeater insertion and technology scaling 显示文摘Banerjee Kaustav Mehrotra Amit 2001IEEE Symposium on VLSI Circuits2001,6,:1
16A CMOS 50% duty cycle repeater using complementary phase blending显示文摘Nakamura K 2000IEEE Symposium on VLSI Circuits2000,15,6:1
17Test data compression technique for embedded cores using virtual scan chains显示文摘Jas A Pouya B Touba N A 2004Trans on VLSI Systems IEEE Circuits & Systems Society2004,12,7:1
18Mobile terminals toward LTE and requirements on decive technologies 显示文摘Shiji Maruyama 2007IEEE Symposium on VLSI Circuits2007,88,78:1
19Novel co-design of NAND flash memory and high- speed solid-state drives显示文摘Takeuchi K 2009VLSI circuit2009,44,4:1
20, Future perspective and scaling down roadmap for RF CMOS 显示文摘Morifuji E Momose H S Ohguro T 1999VLSI Circuit1999,17,:1
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