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		题名	作者	年代	出处	被引量
	1	Recovery of Li_(2)CO_(3)and FePO_(4)from spent LiFePO_(4)by coupling technics of isomorphic substitution leaching and solvent extraction显示文摘Efficient and low-cost recycling of spent lithium iron phosphate(LiFePO_(4),LFP)batteries has become an inevitable trend.In this study,an integrated closed-loop recycling strategy including isomorphic substitution leaching and solvent extraction process for spent LFP was proposed.An inexpensive FeCl_(3)was used as leaching agent to directly substitute Fe^(2+)from LFP.99%of Li can be rapidly leached in just 30 min,accompanied by 98%of FePO_(4)precipitated in lixivium.The tri-n-butyl phosphate(TBP)-sulfonated kerosene(SK)system was applied to extract Li from lixivium through a twelve-stage countercurrent process containing synchronous extraction and stepwise stripping of Li^(+)and Fe^(3+).80.81%of Li can be selectively enriched in stripping liquor containing 3.059 mol·L^(-1)of Li^(+)under optimal conditions.And the Fe stripping liquor was recovered for LFP re-leaching,of which,Fe^(2+)was oxidized to Fe^(3+)by appropriate H_(2)O_(2).Raffinate and lixivium were concentrated and entered into extraction process to accomplished closeloop recycling process.Overall,the results suggest that more than 99%of Li was recovered.FeCl_(3)holding in solution was directly regenerated without any pollutant emission.The sustainable mothed would be an alternative candidate for total element recycling of spent LFP batteries with industrial potential.	Yong Niu Xiaowu Peng Jinfeng Li Yuze Zhang Fugen Song Dong Shi Lijuan Li	2023	Chinese Journal of Chemical Engineering2023，54，2：	1
	2	A 16-bit Hybrid ADC with Circular-Adder-Based Counting for 15μm Pitch 640×512 LWIR FPAs显示文摘A hybrid Analog to digital converter(ADC) is presented for long-wave infrared focal plane arrays. A two-stage quantization structure is applied in the folding integration process, which results in better chargehandling capacity and higher linearity compared with conventional designs while using fewer transistors at the pixel level. By employing a circular-adder-based counting structure with 3 T dynamic memory cells, hardware consumption can be reduced. A pixel circuit of pitch15μm has been designed using the 0.18μm Complementary metal-oxide-semiconductor(CMOS) process. The power consumption of the pixel-level ADC is 0.214μW, and the charge-handling capacity is 1 Ge-. Simulation results demonstrate a signal-to-noise ratio of 90 d B and a nonlinearity of 0.11%.	HUANG Zhaofeng ZHU Yajun LU Wengao NIU Yuze ZHANG Shengdong CHEN Zhongjian	2020	Chinese Journal of Electronics2020，29，2：	1
	3	Construction of a microsatellite-based genetic linkage map for half-smooth tongue sole Cynoglossus semilaevis显示文摘	Wentao SONG Guidong MIAO Yongwei ZHAO Yuze NIU Renyi PANG Xiaolin LIAO Changwei SHAO Songlin CHEN	2013	Current Zoology2013，59，1：	1

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