7篇
您的检索式：作者名="YOSHIMURA 1"
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| 1 | Japanese species of Thyrea显示文摘 | YOSHIMURA 1 | 1968 | Journal of Japanese Botany1968，43，： | 1 |
| 2 | In vivo transfer of the human cystic fibrosis transmembrane conductance regulator gene to theairway epithelium显示文摘 | Rosenfeld MA Yoshimura K Trapnell 1 | 1992 | Cell1992，68，1： | 1 |
| 3 | introduction of basic fibre-blast growth factor gene into mouse renal cell carcinoma cell line enhances its metastatic potential显示文摘 | Miyake H Hara 1 Yoshimura K | 1996 | Cancer Res1996，56，： | 1 |
| 4 | A checklist of lichens and lichenallies frnm Japan 显示文摘 | Harada H Okamoto T Yoshimura 1 2004 | 2004 | Lichenology2004，2，： | 1 |
| 5 | Retrospective nation wide survey of acute stroke due to large vesselocchsion in Japan : a reviewof 1,963 patients and the impact ofendovaseu lartreatment显示文摘 | Yoshimura S Egashira Y Sakai N eta 1 | 2011 | Cere-brovaseDis2011，32，3： | 1 |
| 6 | Off-line writer identification using ordinary characters as the object显示文摘 | YOSHIMURA 1 YOSH1MURA M | 1991 | Pattern Recognition1991，24，9： | 1 |
| 7 | RTL Partial Scan Design System: REPS显示文摘According to increase of circuitry numbers of LSI, the test application time of a full scan design method becomes one of the bottleneck problems for the LSI productivity. The test application time is corresponding to the test length, thus the reduction of the test length in a scan design is strongly required. In this paper, we propose a partial scan design system at RT level design, named REPS, to reduce the test application time. REPS has the following new features: (1) a scan register selection method at RT level; (2) a DFT database is prepared to estimate test length of blocks; and (3) a DFT strategy generation for the shortest test length. We applied REPS to some test designs for a practical LSI that described at RT level. It is found that REPS estimates an accurate test length for an LSI at RTL, i.e. the error of the length is less than 10% from that at the gate level. As a result, the test length generated by the partial scan design method was 37% shorter than that by the conventional full scan design method. | Toshinori Hosokawa, Masayoshi Yoshimura, and Mitsuyasu Ohta Corporate Semiconductor Development Division Matsushita Electric Industrial Co., Ltd. 1 KOTARIYAKIMACHI NAGAOKAKYO-SHI KYOTO 617-8520 JAPAN | 2000 | 湖南大学学报(自然科学版)2000，27，S2： | 0 |
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