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3篇 您的检索式：作者名="LUAN SuZhen"

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		题名	作者	年代	出处	被引量
	1	Frequency dispersion effect and parameters extraction method for novel HfO_2 as gate dielectric显示文摘The electric characteristic of MOS capacitor with HfO_2/SiO_2/p-Si grown by ALCVD (atom layer chemical vapor deposition) is investigated. The C-V curves show that the accumulation capacitances take on the frequency dispersion at high frequency. For MOS capacitor with ultra thin HfO_2/SiO_2 gate stack, different fabrication processes and measurement equipment will cause parasitic effect. Here an equivalent circuit model that can eliminate the frequency dispersion effect is proposed. The C-V characteristics curve at high frequency shows some distortion because of the bulk defects and the interface states. This paper discusses the distortion of the high frequency MOS C-V characteristic curve. A data processing method is advanced and interface trap density distribution in the band gap is presented. By comparing the ideal C-V curve with the experimental C-V curve, the typical electrical parameters of MOS capacitor are extracted, including the shift of flat-band voltage, the oxide charges and the density of interface traps at the SiO_2/Si interface.	LIU HongXia KUANG QianWei LUAN SuZhen ZHAO Aaron TALLAVARJULA Sai	2010	Science China(Information Sciences)2010，53，4：	0
	2	Performance investigations of novel dual-material gate(DMG) MOSFET with dielectric pockets(DP)显示文摘Dual-material gate MOSFET with dielectric pockets (DMGDP MOSFET) is proposed to eliminate the potential weakness of the DP MOSFET for CMOS scaling toward the 32 nm gate length and beyond. The short-channel effects (SCE) can be effectively suppressed by the insulator near the source/drain regions. And the suppression capability can be even better than the DP MOSFET due to the drain bias absorbed by the screen gate. The speed performance and electronic characteristics of the DMGDP MOSFET are comprehensively studied. Compared to the experimental data from Jurczak et al., the DMGDP PMOSFET exhibits good subthreshold characteristics and the on-state current is almost the twice that of the DP PMOSFET. The intrinsic delay of the NMOS reaches 21% greater than the DP MOSFET for 32 nm node. The higher fT of 390 GHz is achieved, which is a 32% enhancement in comparison with the DP MOSFET when the gate length is 50 nm. Finally, the design guideline and the optimal regions of the DMGDP MOSFET are discussed.	LUAN SuZhen LIU HongXia JIA RenXu	2009	Science China(Technological Sciences)2009，52，8：	0
	3	Two-dimensional subthreshold current model for dualmaterial gate SOI nMOSFETs with single halo显示文摘A two-dimensional(2D)model for the subthreshold current in the dual-material gate(DMG)siliconon-insulator(SOI)MOSFET with a single halo is presented.The model considers single halo doping in the channel near the source and a dual-material gate to derive the channel potential using the explicit solution of the 2D Poisson’s equation.Together with the conventional driftdiffusion theory,this results in the development of a subthreshold current model for the novel structure.Model verification is carried out using the 2D device simulator ISE.Excellent agreement is obtained between the calculations and the simulated results of the model.	Suzhen LUAN Hongxia LIU Renxu JIA Jin WANG	2009	Frontiers of Electrical and Electronic Engineering in China2009，4，1：	0

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