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36篇 您的检索式：作者名="Mayaram"

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	题名	作者	年代	出处	被引量
1	An On-Chip Calibration Technique for Reducing Supply Voltage Sensitivity in Ring Oscillators显示文摘	Wu T Mayaram K Moon U	2007	IEEE J Solid-State Circuits2007，42，4：	1
2	Simulation and Modeling显示文摘	Farid Najm Karti Mayaram	1995	Circuits and Devices1995，11，3：	1
3	Method for a constant loop bandwidth in LC-VCO PLL frequency synthesizers 显示文摘	WU Ting HANUMOLU P K MAYARAM K	2009	IEEE Journal of Solid-State Circuits2009，44，2：	1
4	Coupling algorithms for mixed-level circuit and device simulation显示文摘	Mayaram K Pederson D O	1992	IEEE Trans Computer-Aided Design1992，11，8：	1
5	Algorithms for transient three-dimensional mixed-level circuit and device simulation显示文摘	Mayaram K Chern J H Yang P	1993	IEEE Trans CAD of Integrated Circuits arid Systems1993，12，11：	1
6	Simulation and Modeling显示文摘	NAJM F MAYARAM K	1995	Circuits and Devices1995，11，3：	1
7	Designoriented substrate noise coupling macromodels for heavily doped CMOS processes显示文摘	SAMAVEDAM A MAYARAM K FIEZ T	1999	IEEE J Solid-State Circuits1999，34，2：	1
8	Me- thod for a constant loop bandwidth in LC-VCO PLL frequency synthesizers 显示文摘	WU T HANUMOLU P K MAYARAM K	2009	IEEE Journal of Solid-State Circuits2009，44，2：	1
9	Computer-Aided Circuit Analysis Tools for RFIC Simulation: Algorithms, Features, and Limitations显示文摘	Kartikeya Mayaram David C Lee Shahriar Moinian	2000	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-II: ANALOG AND DIGITAL SIGNAL PROCESSING2000，47，4：	1
10	A scalable substrate noise coupling model for mixed-signal ICs显示文摘	Samavedam Anil Mayaram Karti Fiez Terri	1999	IEEE Tran on Computer-aided Design of Integrated Circuits and Systems1999，18，5：	1
11	Modeling of substarte noise coupling for nMOS transistors in heavily doped substrates显示文摘	Hsu Shuching Fiez Terri Mayaram Kartikeya	2005	IEEE Trans on Electron Devices2005，52，8：	1
12	Efficient Far-Field Radio Frequency Energy Harvesting for Passively Powered Sensor Networks 显示文摘	Le T Mayaram K Fiez T	2008	IEEE Journal of Solid-State Circuits2008，43，5：	1
13	Analysis of charge-pump phase-locked loops显示文摘	Hanumolu P K Brownlee M Mayaram K		0，，：	1
14	Computer- Aided circuit analysis tools for RFIC simulation: algorithms, featuresand limitations显示文摘	Kartikeya Mayaram David lee Shahriar Moinian	2000	IEEE Transaction on Circuits and Systems- Ⅱ: Analog and Digital Signal Proceeding2000，47，4：	1
15	An on-chip calibration technique for reducing supply voltage sensitivity in ring oscillators 显示文摘	WU TING MAYARAM K MOON U K	2007	IEEE Journal of Solid-State Circuits2007，42，4：	1
16	Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes显示文摘	Samavedam Anil Kartikeya Mayaram	1999	IEEE J Solid-state Circuits1999，34，6：	1
17	Analysis of Charge-Pump Phase- Locked Loops显示文摘	Paean Kumar Hanumolu Merrick Brownlee Kartikeya Mayaram Un-Ku Moon	2004	IEEE Transactions on Circuits and Systems2004，51，9：	1
18	An uhralow-power receiver for wireless sensor networks 显示文摘	Ayers J Mayaram K Fiez T S	2010	1EEE Journal of Solid-State Circuits2010，45，9：	1
19	Analysis of charge-pump phase-locked loops显示文摘	HANUMOLU P BROWNLEE M MAYARAM K	2004	IEEE Transactions on Circuits and Systems-Ⅰ2004，51，9：	1
20	Analysis of charge-pump phase-locked loops 显示文摘	HANUMOLU P K BROWNLEE M MAYARAM K	2004	IEEE Transactions on Circuits and Systems: I2004，51，9：	1

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