|
|
|
题名
|
作者
|
年代
|
出处
|
被引量
|
| 1 | Modeling and optimal design of multilayer thermal cantilever microactuators显示文摘A model of curvature and tip deflection of multilayer thermal cantilever actuators is derived.The sim-plified expression received from the model avoids inverting complex matrices enhances understanding and makes it easier to optimize the structure parameters.Experiment is performed,the modeled and experimental results demonstrate the validity of the model,and it also indicates that Young's module makes great contribution to the deflection;therefore,thin layers cannot be ignored arbitrarily. | FU JianYu CHEN DaPeng YE TianChun JIAO BinBin OU Yi | 2009 | Science China(Technological Sciences)2009，52，5： | 5 |
| 2 | 200 nm gate-length GaAs-based MHEMT devices by electron beam lithography显示文摘GaAs-based metamorphic HEMTs (MHEMT) consist of GaAs substrates and InP-based epitaxial structure, and have the advantages of both InP HEMT's excellent performances and GaAs-based HEMT's mature processes. GaAs-based MHEMTs were applied to millimeter-wave low-noise, high-power applications and systems. The current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) are important performance parameter of GaAs-based MHEMTs, and they are limited by the gate-length mainly. Electron beam lithography is one of the lithography technologies which can be used to realize the deep submicron gate-length. The 200 nm gate-length GaAs-based MHEMTs have been fabricated by electron beam lithography. In order to reduce the parasite gate capacitance and gate resistance, a trilayer resist structure was used to pattern the T-gate resist profile. Excellent DC, high frequency and power performances have been obtained. FT and fmax are 105 GHz, 70 GHz respectively. The research is very helpful to obtain higher performance GaAs-based MHEMTs. | XU JingBo ZHANG HaiYing WANG WenXin LIU Liang LI Ming FU XiaoJun NIU JieBin YE TianChun | 2008 | Chinese Science Bulletin2008，53，22： | 4 |
| 3 | A NEW LOW-COST DEMODULATOR FOR 2.4 GHZ ZIGBEE RECEIVERS显示文摘A new low-cost demodulator for ZigBee receivers satisfying requirements of IEEE802.15.4 standard is presented,which is designed for ISM 2.4 GHz band and based on Zero-IF receivers.This demodulator extracts symbols directly from baseband signal rather than recovering PN code chips,so its structure is simple.Two main techniques are used to improve the performance of demodulator.One is Phase-Axis Crossing Detector(PACD) which detects the phase correlation of baseband signal.The other is symbol synchronization and sampling clock correction algorithm.The result shows that this demodulator performance,Symbol Error Rate(SER) and Packet Error Rate(PER) meet IEEE 802.15.4TM standard requirements and the demodulator can handle frequency offset in excess of 200 kHz,involving a Zero-IF receiver with a Noise Figure(NF) lower than 17 dB,which is easily imple-mented in standard CMOS technology. | Yu Yunfeng Meng Xin Xiao Shimao Ma Chengyan Ye Tianchun | 2009 | Journal of Electronics(China)2009，26，2： | 2 |
| 4 | Research on ultra-small textured surface of multicrystalline silicon solar cell显示文摘The ultra-small textured surface of multicrystalline silicon solar cell,prepared by electroless chemical-etching method,shows an excellent anti-reflection property over a wide spectral bandwidth.A novel back surface protection method and front surface passivation method have been used in the multicrystalline solar cells with ultra-small textured surfaces.With these improvements,the back surface remains intact after the etch process and the efficient minority lifetime is apparently increased.The test result shows that the solar cell with ultra-small textured surface can obtain better electrical performances by these improvements. | LI HaoFeng JIA Rui DOU BingFei CHEN Chen XING Zhao YANG YongZhou DING WuChang MENG YanLong LIU XinYu YE TianChun LI ShangQing | 2013 | Science China(Technological Sciences)2013，56，4： | 2 |
| 5 | Tri-Layer Resist Fabrication Technology of T-Shaped Gate Using X-Ray Lithography 显示文摘 | Sun Jiaxing Ye Tianchun | 2004 | Chinese Journal of Semiconductors2004，25，3： | 1 |
| 6 | Design and Analysis of a Gain-Enhanced,Fully Differential Telescopic Operational Transconductance Amplifier显示文摘 | Yao Zhijian Ma Chenyan Ye Tianchun | 2008 | Journal of Semiconductprs2008，2，29： | 1 |
| 7 | Advanced Process and Electron Device Technology显示文摘This article reviews advanced process and electron device technology of integrated circuits,including recent featuring progress and potential solutions for future development.In 5 years,for pushing the performance of fin field-effect transistors(FinFET)to its limitations,several processes and device boosters are provided.Then,the three-dimensional(3 D)integration schemes with alternative materials and device architectures will pave paths for future technology evolution.Finally,it could be concluded that Moore’s law will undoubtedly continue in the next 15 years. | Dan Zhang Xiaojing Su Hao Chang Hao Xu Xiaolei Wang Xiaobin He Junjie Li Fei Zhao Qide Yao Yanna Luo Xueli Ma Hong Yang Yongliang Li Zhenhua Wu Yajuan Su Tao Yang Yayi Wei Anyan Du Huilong Zhu Junfeng Li Huaxiang Yin Jun Luo Tianchun Ye Wenwu Wang | 2022 | Tsinghua Science and Technology2022，27，3： | 1 |
| 8 | Study on electrothermally actuated cantilever array for nanolithography显示文摘Nanolithography is a patterning technique for the fabrication of nano-scale structures.A promising method of nanolithography known as scanning probe lithography has particularly extensive applications for its high resolution,high reliability,and simple operation.In this paper,a novel electrothermally actuated cantilever with integrated heater,thermal conductor and actuator for scanning probe lithography is proposed.Cantilevers are designed in an 8×4 array.Analytical models are presented to simulate the temperature distribution,deflection and thermal crosstalk of the cantilever array.This structure is successfully fabricated.It is demonstrated that this structure can produce a tip deflection of 16.9 μm at an actuation current of 5.5 mA and the thermal crosstalk between the cantilevers is neglected. | FU JianYu,CHEN DaPeng & YE TianChun Integrated Circuit Advanced Process Center,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China | 2010 | Science China(Technological Sciences)2010，53，5： | 1 |
| 9 | Top-gated graphene field-effect transistors on SiC substrates显示文摘We report on a demonstration of top-gated graphene field-effect transistors(FETs) fabricated on epitaxial SiC substrate.Composite stacks,benzocyclobutene and atomic layer deposition Al2O3,are used as the gate dielectrics to maintain intrinsic carrier mobility of graphene.All graphene FETs exhibit n-type transistor characteristics and the drain current is nearly linear dependence on gate and drain voltages.Despite a low field-effect mobility of 40 cm2/(V s),a maximum cutoff frequency of 4.6 GHz and a maximum oscillation frequency of 1.5 GHz were obtained for the graphene devices with a gate length of 1 μm. | MA Peng JIN Zhi GUO JianNan PAN HongLiang LIU XinYu YE TianChun JIA YuPing GUO LiWei CHEN XiaoLong | 2012 | Chinese Science Bulletin2012，57，19： | 0 |
| 10 | Peak Power Minimizing Algorithm by Voltage Scheduling显示文摘 | SU Yajuan WEI Shaojun YE Tianchun CHEN Lan LUO Jiajun | 2008 | Chinese Journal of Electronics2008，17，1： | 0 |
| 11 | Enhancement of pattern quality in maskless plasmonic lithography via spatial loss modulation显示文摘Plasmonic lithography,which uses the evanescent electromagnetic(EM)fields to generate image beyond the diffraction limit,has been successfully demonstrated as an alternative lithographic technology for creating sub-1o nm patterns.However,the obtained photoresist pattern contour in general exhibits a very poor fidelity due to the near-field optical proximity effect(OPE),which is far below the minimum requirement for nanofabrication.Understanding the near-field OPE formation mechanism is important to minimize its impact on nanodevice fabrication and improve its lithographic performance.In this work,a point-spread function(PSF)generated by a plasmonic bowtie-shaped nanoaperture(BNA)is employed to quantify the photon-beam deposited energy in the near-field patterning process.The achievable resolution of plasmonic lithography has successfully been enhanced to approximately 4 nm with numerical simulations.A field enhancement factor(F)as a function of gap size is defined to quantitatively evaluate the strong near-field enhancement effect excited by a plasmonic BNA,which also reveals that the high enhancement of the evanescent field is due to the strong resonant coupling between the plasmonic waveguide and the surface plasmon waves(SPWs).However,based on an investigation of the physical origin of the near-field OPE,and the theoretical calculations and simulation results indicate that the evanescent-field-induced rapid loss of high-k information is one of the main optical contributors to the near-feld OPE.Furthermore,an analytic formula is introduced to quantitatively analyze the effect of the rapidly decaying feature of the evanescent field on the final exposure pattern profile.Notably,a fast and effective optimization method based on the compensation principle of the exposure dose is proposed to reduce the pattern distortion by modulating the exposure map with dose leveling.The proposed pattern quality enhancement method can open new possibilities in the manufacture of nanostructures with ultrahigh pattern quality via plasmonic lithography,which would find potentially promising applications in high density optical storage,biosensors,and plasmonic nanofocusing. | Dandan Han Sen Deng Tianchun Ye Yayi Wei | 2023 | Microsystems & Nanoengineering2023，9，2： | 0 |
| 12 | A novel MEMS-based focal plane array for infrared imaging显示文摘On the basis of opto-mechanical effect and micro electromechanical system(MEMS)technology,a novel substrate-free focal plane array(FPA)with the thermal isolated structure for uncooled infrared imaging is developed,even as alternate evaporated Au on SiN cantilever is used for thermal isolation.A human thermal image is obtained successfully by using the infrared imaging system composed of the FPA and optical detecting system.The experiment results show that the realization of thermal isolation structure in substrate-free FPA increases the temperature rise of the deflecting leg effectively,whereas the noise equivalent temperature difference(NETD)is about 200 mK. | LI Chaobo JIAO Binbin SHI Shali YE Tianchun CHEN Dapeng ZHANG Qingchuan GUO Zheying DONG Fengliang WU Xiaoping | 2007 | Frontiers of Electrical and Electronic Engineering in China2007，2，1： | 0 |
| 13 | Research on the surface passivation of nanostructure-textured crystalline silicon solar cell显示文摘Nanostructure-textured solar cell owns unique properties but has some shortages especially in its fabrication and passivation.In this paper,nanostructures for crystalline silicon solar cell have been synthesized by controllable method based on silver catalyzed chemical etching.In this way,only the front surface of cell is etched and rear surface is protected.It was found that cells textured via the new method obtained equally excellent optical while superior electrical properties compared with those textured via traditional HF/AgNO3 etching.The V OC and I SC of the cell were improved by 6% and 11%,respectively.Then the cells were passivated via a bi-layer passivation(SiO2 & SiN x),in contrast to traditional SiN x passivation.It was also found that cells with new passivation exhibited improved V OC and I SC by 4% and 25%,respectively.The encouraging results can provide fundamental data for developing the nanostructure-textured crystalline silicon solar cell in following researches. | DOU BingFei JIA Rui LI HaoFeng CHEN Chen MENG YanLong LIU XinYu YE TianChun | 2013 | Science China(Technological Sciences)2013，56，1： | 0 |
| 14 | Foreword to the Journal of Microelectronic Manufacturing显示文摘Over 70 years have passed since the first transistor was invented at Bell Labs,New Jersey,USA on 16 December 1947 by William Shockley,John Bardeen and Walter Brattain,which was perhaps the most important electronics event of the 20th century as it later made possible the integrated circuit(IC)and microprocessor that are the basis of modern electronics.The first electronic products were made from individual transistors but before long engineers learnt how to integrate several simultaneously,giving birth to the first IC in 1957.Industry development thereafter followed a predominantly evolutionary process with the number of transistors on an IC increasing exponentially each year,a process known as Moore’s Law after one of the semiconductor industry’s key founding fathers. | Tianchun Ye | 2018 | Journal of Microelectronic Manufacturing2018，1，1： | 0 |
| 15 | Multiple SiGe/Si layers epitaxy and SiGe selective etching for vertically stacked DRAM显示文摘Fifteen periods of Si/Si_(0.7)Ge_(0.3)multilayers(MLs)with various Si Ge thicknesses are grown on a 200 mm Si substrate using reduced pressure chemical vapor deposition(RPCVD).Several methods were utilized to characterize and analyze the ML structures.The high resolution transmission electron microscopy(HRTEM)results show that the ML structure with 20 nm Si_(0.7)Ge_(0.3)features the best crystal quality and no defects are observed.Stacked Si_(0.7)Ge_(0.3)ML structures etched by three different methods were carried out and compared,and the results show that they have different selectivities and morphologies.In this work,the fabrication process influences on Si/Si Ge MLs are studied and there are no significant effects on the Si layers,which are the channels in lateral gate all around field effect transistor(L-GAAFET)devices.For vertically-stacked dynamic random access memory(VS-DRAM),it is necessary to consider the dislocation caused by strain accumulation and stress release after the number of stacked layers exceeds the critical thickness.These results pave the way for the manufacture of high-performance multivertical-stacked Si nanowires,nanosheet L-GAAFETs,and DRAM devices. | Zhenzhen Kong Hongxiao Lin Hailing Wang Yanpeng Song Junjie Li Xiaomeng Liu Anyan Du Yuanhao Miao Yiwen Zhang Yuhui Ren Chen Li Jiahan Yu Jinbiao Liu Jingxiong Liu Qinzhu Zhang Jianfeng Gao Huihui Li Xiangsheng Wang Junfeng Li Henry HRadamson Chao Zhao Tianchun Ye Guilei Wang | 2023 | Journal of Semiconductors2023，44，12： | 0 |
| 16 | A High Gain CMOS Closed Loop Variable Gain Amplifier with Digital AGC Circuits显示文摘 | GAO Darning YE Qing YE Tianchun | 2006 | Chinese Journal of Electronics2006，15，4： | 0 |
| 17 | Optimization and design of a novel prescaler and its application to GPS receivers显示文摘In this work,a novel prescaler based upon new current mode logic (CML) flip-flop architecture applied to global positioning system (GPS) receivers is proposed.Compared to traditional static current mode logic (CML) flip-flop,it introduces a clock-controlling transistor to reduce the time constant at sensing period.As a result,the speed has been maximized and the working range has been enlarged.The phase noise of local oscillator (LO) signals coming from the prescaler can be lowered by 6 dB,and the interference of voltage controlled oscillator (VCO) to radio-frequency (RF) front-end apartments (low noise amplifier,mixer,etc.) will be diminished so that the sensitivity of GPS receivers is enhanced.This prescaler's maximum input frequency rises up to 6.9 GHz,30% higher than that of traditional architecture,and its power is only 2.16 mW when the supply voltage is 1.8 V.The prescaler was manufactured in 0.18-μm CMOS process,and it has been successfully applied to GPS receivers. | YU YunFeng YE TianChun MA ChengYan | 2011 | Science China(Information Sciences)2011，54，9： | 0 |
您所在的机构暂未开通此部分的功能，请联系管理员